Title Optimization of horizontal current bipolar transistor structure Title (croatian) Optimiranje strukture bipolarnog tranzistora s horizontalnim tokom struje Author Tomislav Suligoj Mentor Petar Biljanović (mentor)Committee member Zvonko Benčić (predsjednik povjerenstva)Committee member Petar Biljanović (član povjerenstva)Committee member Jože Furlan (član povjerenstva) Committee member Kang L. Wang (član povjerenstva) Committee member Željko Butković (član povjerenstva)Granter University of Zagreb Defense date and country 2001-11-29, Croatia Scientific / art field, TECHNICAL SCIENCES Universal decimal classificationUDC ) 621.3 - Electrical engineering Abstract A novel silicon bipolar transistor called Horizontal Current Bipolar Transistor (HCBT) is successfully developed and fabricated, as the first bipolar device with horizontal current flow and with optimized doping profiles. First, the existing Si/SiGe bipolar transistors are analyzed. It is shown that the major limitations of conventional vertical-current Super Self-aligned Transistors (SST) are the complicated technology and the large volume of parasitic regions, resulting in the large footprint of the device and large extrinsic parameters. The Silicon-On-Insulator Lateral Bipolar Transistors (SOI LBT) can be processed by fewer lithography masks and process steps, reducing their parasitic regions volume. But they are processes exclusively on SOI substrates and their intrinsic doping profiles are processed by lateral distribution of dopants with lower repeatability and controllability. A new HCBT structure can be processed by simpler technology, employing single polysilicon layer, without trench isolation, epitaxy and buried layer with the reduced number of lithography masks and technological steps comparing to SST structures. It is processed in bulk silicon wafer with optimized intrinsic doping profiles and reduced transistor footprint and parasitic capacitances. A novel technology is developed in 1 µm minimum lithography linewidth with mask alignment tolerances of 1 µm, 0.6 µm and 0.3 µm. The technological limitations of already proposed HCBT structures by process simulators are changed and overcome, improving HCBT technology simplicity and integrability with other devices further. The processes developed to improve HCBT properties are as follows. The low-stress nitride is deposited as the n-hill cap layer to reduce the dislocations generation after extrinsic base ion implantation and subsequent annealing steps. The n-hill sidewall roughness is minimized by employing <110> wafer and the combination of DRIE and crystallographic dependent etch. The isolation oxide at the bottom of the n-hill is fabricated by CMP and wet etch back technique, employing a novel CMP setup using a teflon plate and gamma alumina powder diluted in KOH added slurry. Lithography is optimized to minimize n-hill undercut from the passive sidewalls. The intrinsic and extrinsic base regions are angle-implanted to protect the structure from collector-emitter punchthrough. Polysilicon is etched by TMAH with high selectivity to the active transistor sidewall. Buffer oxide undercut is suppressed by timed BOE etch. The processed HCBT transistor has maximum current gain of 40, cutoff frequency of 4.6 GHz, maximum frequency of oscillations of 14 GHz and collectoremitter breakdown voltage of 15.5 V, resulting in fT ⋅ BVCEO product as high as 71 GHzV. Numerical simulations shows that electrical properties can be improved by lithography paremeters scaling down and optimization of doping profiles.
Abstract (croatian) U okviru ovog rada razvijen je novi silicijski bipolarni tranzistor s horizontalnim tokom struje (engl. Horizontal Current Bipolar Transistor - HCBT), kao prvi bipolarni tranzistor s horizontalnim tokom struje i optimiranim raspodjelama primjesa. Najprije su analizirani postojeći Si/SiGe bipolarni tranzistori. Pokazano je da su najveća ograničenja konvencionalnih samopodešavajućih tranzistora s vertikalnim tokom struje (engl. Super Self-aligned Transistors - SST) komplicirana tehnologija i veliki volumen ekstrinsičnih područja, što rezultira u velikoj površini elementa i velikim ekstrinsičnim parametrima. Lateralni bipolarni tranzistori (engl. Silicon-OnInsulator Lateral Bipolar Transistors - SOI LBT) se mogu procesirati sa manjim brojem litografskih maski i tehnoloških koraka, smanjujući volumen parazitnih područja. No oni su procesirani isključivo na SOI podlogama i njihov profil primjesa u intrinsičnom dijelu tranzistora dobiven je lateralnom raspodjelom, koja ima lošiju ponovljivost i mogućnost kontrole. Nova HCBT struktura može se dobiti jednostavnijom tehnologijom, koristeći jednostruki sloj polisilicija, bez dubokih izolacija žlijebom, procesa epitaksije i potkolektorskog sloja, sa smanjenim brojem litografskih maski i tehnoloških procesa u usporedbi sa SST strukturama. HCBT je procesiran na silicijskom waferu sa optimiranim raspodjelama primjesa u intrinsičnom dijelu tranzistora, manjom površinom tranzistora i manjim parazitnim kapacitetima. Nova tehnologija razvijena je u 1 µm litografiji sa tolerancijama pomaka maski od 1 µm, 0.6 µm i 0.3 µm. Tehnološka ograničenja već postojeće HCBT strukture, razvijene računalnim simulacijama, su promijenjena i popravljena, čime je dodatno unaprijeđena tehnološka jednostavnost i integrabilnost sa drugim elementima. Procesi razvijeni za naprednu HCBT strukturu prikazani su kao što slijedi. Nitrid sa malim stresom koristi se kao zaštitni sloj na vrhu n-brijega smanjujući stvaranje dislokacija nakon implantacije ekstrinsične baze i procesa napuštanja koji slijede. Bočna hrapavost n-brijega je smanjena korištenjem <110> wafera i kombinacije DRIE i kristalografski ovisnog mokrog jetkanja. Izolacijski oksid na dnu n-brijega procesira se CMP tehnikom i mokrim jetkanjem, koristeći novi CMP proces sa teflonskom podlogom i prahom aluminijskog oksida u otopini s KOH-om. Litografija je optimirana za smanjenje podjetkavanje n-brijega sa strana pasivnih bokova. Intrinsična i ekstrinsična baza implantirane su pod kutovima kako bi se spriječio prohvat baze. Polisilicij se jetka TMAH otopinom čime se postiže visoka selektivnost prema aktivnim bokovima n-brijega. Podjetkavanje međuoksida smanjuje se vremenskim BOE jetkanjem.
Procesirani HCBT tranzistor ima maksimalno strujno pojačanje 40, frekvenciju jediničnog strujnog pojačanja 4,6 GHz, maksimalnu frekvenciju osciliranja 14 GHz, probojni napon kolektor-emiter 15.5 V, što daje iznos produkta fT ⋅ BVCEO od čak 71 GHzV. Numerička analiza dobivene strukture pokazuju da se daljnje poboljšanje karakteristika može postići skaliranjem rezolucije litografije i optimiranjem raspodjele primjesa.
Keywords
Bipolar
Si/SiGe
self aligned
lateral
HCBT
SST
LBT
Keywords (croatian)
Bipolarni
Si/SiGe
samopodešavajući
lateralni
HCBT
SST
LBT
Language english URN:NBN urn:nbn:hr:168:302827 Study programme Title: Doctoral study programme "Electrical Engineering and Computing" Type of resource Text File origin Born digital Access conditions Closed access Terms of use Repository FER Repository Created on 2019-04-24 10:29:26
