prikaz prve stranice dokumenta Analysis of Conducted Electromagnetic Emissions in Integrated Circuits
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scientific master's theses
Analysis of Conducted Electromagnetic Emissions in Integrated Circuits
Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing, 2007. urn:nbn:hr:168:335496
Čeperić, Vladimir
University of Zagreb
Faculty of Electrical Engineering and Computing
Department of Electronics, Microelectronics, Computer and Intelligent Systems

Cite this document

Čeperić, V. (2007). Analysis of Conducted Electromagnetic Emissions in Integrated Circuits (Scientific master's theses). Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:335496

Čeperić, Vladimir. "Analysis of Conducted Electromagnetic Emissions in Integrated Circuits." Scientific master's theses, University of Zagreb, Faculty of Electrical Engineering and Computing, 2007. https://urn.nsk.hr/urn:nbn:hr:168:335496

Čeperić, Vladimir. "Analysis of Conducted Electromagnetic Emissions in Integrated Circuits." Scientific master's theses, University of Zagreb, Faculty of Electrical Engineering and Computing, 2007. https://urn.nsk.hr/urn:nbn:hr:168:335496

Čeperić, V. (2007). 'Analysis of Conducted Electromagnetic Emissions in Integrated Circuits', Scientific master's theses, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 04 October 2022, https://urn.nsk.hr/urn:nbn:hr:168:335496

Čeperić V. Analysis of Conducted Electromagnetic Emissions in Integrated Circuits [Scientific master's theses]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2007 [cited 2022 October 04] Available at: https://urn.nsk.hr/urn:nbn:hr:168:335496

V. Čeperić, "Analysis of Conducted Electromagnetic Emissions in Integrated Circuits", Scientific master's theses, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2007. Available at: https://urn.nsk.hr/urn:nbn:hr:168:335496

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Metadata
TitleAnalysis of Conducted Electromagnetic Emissions in Integrated Circuits
Title (croatian)Analiza vođenih elektromagnetskih smetnji u integriranim sklopovima
AuthorVladimir Čeperić
MentorAdrijan Barić (mentor)
Committee memberAdrijan Barić (član povjerenstva)
GranterUniversity of Zagreb
Faculty of Electrical Engineering and Computing
(Department of Electronics, Microelectronics, Computer and Intelligent Systems)
Zagreb
Defense date and country2007, Croatia
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Electrical Engineering
Electronics
Universal decimal classification
(UDC)		621.3 - Electrical engineering
Abstract
Design of integrated circuits (IC) is a very complex task. One of the most critical steps in the design process is the estimation of electromagnetic compatibility (EMC) of the designed circuit. Electronic equipment has to comply with electromagnetic compatibility standards and integrated circuits are most often the root cause of disturbances in electronic systems. The standards regarding conducted EME (Electromagnetic Emission) and EMI(Electromagnetic Immunity) are measured and simulated as the first step towards achieving EM compatibility. Models suitable for simulations of EM emissions and immunity are developed and their accuracy is assessed. An EMC aware design procedure and effective circuit optimization strategy are demonstrated. An EMC test chip is designed in submicron CMOS technology, processed, measured and the measurement results are compared with simulations in order to demonstrate the validity and accuracy of models and procedures described in this thesis.
Abstract (croatian)
Projektiranje integriranih sklopova vrlo je složen postupak. Jedan od najsloženijih zadataka u projektiranju integriranih sklopova je procjena elektromagnetske kompatibilnosti (EMC). Elektronički proizvodi moraju zadovoljiti standarde za elektromagnetsku kompatibilnost, a najčešći izvor i uzrok smetnji u elektroničkim sustavima su integrirani sklopovi. Da bi se ispitala elektromagnetska kompatibilnost integriranih sklopova u ovom su radu simulirani i mjereni standard za emisiju vođenih elektromagnetskih smetnji i standard za imunitet na vođene elektromagnetske smetnje. Razvijeni su modeli prikladni za simulaciju elektromagnetske emisije i imuniteta, te je procijenjena njihova točnost. Projektiranje elektromagnetski kompatibilnih integriranih sklopova pojednostavljeno je povezivanjem modela potrebnih za analizu elektromagnetske kompatibilnosti s optimizacijskim procedurama. Da bi se procijenila točnost takvih modela, projektirani su, procesirani i izmjereni integrirani sklopovi u submikrometarskoj CMOS tehnologiji i rezultati mjerenja uspoređeni su s rezultatima simulacija.
Keywords
Keywords (croatian)
Languageenglish
URN:NBNurn:nbn:hr:168:335496
Study programmeTitle: Postgraduate master programme in electrical engineering
Study programme type: university
Study level: postgraduate
Academic / professional title: Magistar znanosti elektrotehnike (Magistar znanosti elektrotehnike)
Type of resourceText
File originBorn digital
Access conditionsClosed access
Terms of useLicence In copyright icon
RepositoryFER Repository
Created on2020-04-08 07:40:31

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