Paralelni algoritmi izgradnje i manipulacije binarnim dijagramima odlučivanja

Grudenić, Igor

prikaz prve stranice dokumenta Paralelni algoritmi izgradnje i manipulacije binarnim dijagramima odlučivanja

No public access

scientific master's theses

Paralelni algoritmi izgradnje i manipulacije binarnim dijagramima odlučivanja

Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing, 2006. urn:nbn:hr:168:881136

Grudenić, Igor

University of Zagreb
Faculty of Electrical Engineering and Computing
Department of Electronics, Microelectronics, Computer and Intelligent Systems

Cite this document

APA 6th Edition

Grudenić, I. (2006). Paralelni algoritmi izgradnje i manipulacije binarnim dijagramima odlučivanja (Scientific master's theses). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:881136

MLA 8th Edition

Grudenić, Igor. "Paralelni algoritmi izgradnje i manipulacije binarnim dijagramima odlučivanja." Scientific master's theses, University of Zagreb, Faculty of Electrical Engineering and Computing, 2006. https://urn.nsk.hr/urn:nbn:hr:168:881136

Chicago 17th Edition

Harvard

Grudenić, I. (2006). 'Paralelni algoritmi izgradnje i manipulacije binarnim dijagramima odlučivanja', Scientific master's theses, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 17 September 2024, https://urn.nsk.hr/urn:nbn:hr:168:881136

Vancouver

Grudenić I. Paralelni algoritmi izgradnje i manipulacije binarnim dijagramima odlučivanja [Scientific master's theses]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2006 [cited 2024 September 17] Available at: https://urn.nsk.hr/urn:nbn:hr:168:881136

IEEE

I. Grudenić, "Paralelni algoritmi izgradnje i manipulacije binarnim dijagramima odlučivanja", Scientific master's theses, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2006. Available at: https://urn.nsk.hr/urn:nbn:hr:168:881136

Cite this item: https://urn.nsk.hr/urn:nbn:hr:168:881136

Please login to the repository to save this object to your list.

Metadata

Title	Paralelni algoritmi izgradnje i manipulacije binarnim dijagramima odlučivanja
Title (english)	Parallel Algorithms for Construction and Manipulation of Binary Decision Diagrams
Author	Igor Grudenić
Mentor	Nikola Bogunović (mentor)
Committee member	Leo Budin (član povjerenstva)
Committee member	Nikola Bogunović (član povjerenstva)
Committee member	Dragan Gamberger (član povjerenstva)
Granter	University of Zagreb Faculty of Electrical Engineering and Computing (Department of Electronics, Microelectronics, Computer and Intelligent Systems) Zagreb
Defense date and country	2006-01-26, Croatia
Scientific / art field, discipline and subdiscipline	TECHNICAL SCIENCES Computing
Universal decimal classification (UDC)	004 - Computer science and technology. Computing. Data processing
Abstract	Binarni dijagrami odlučivanja (BDD) dijagrami omogućavaju učinkovit prikaz i formalnu verifikaciju digitalnih sustava. Postoje razne heuristike za optimizaciju formalne verifikacije BDD dijagramima. Jedan od načina za poboljšanje efikasnosti formalne verifikacije temeljene na BDD dijagramima je raspodijeljena izgradnja i manipulacija BDD dijagramima. Prednost raspodijeljene izgradnje BDD dijagrama leži u većoj procesorskoj snazi i većoj količini raspoloživog memorijskog prostora. Magistarski rad opisuje raspodijeljeni algoritam izgradnje i manipulacije BDD dijagramima namijenjen sustavu umreženih računala zasnovan na kombiniranom pristupu izgradnje BDD dijagrama. U radu je prikazana arhitektura i neki od detalja implementacije programskog ostvarenja tog algoritma. Mjerenja učinkovitosti algoritma provedena su izgradnjom BDD prikaza digitalnog množila i zbrajala zbog njihovog karakterističnog BDD prikaza. Mjerenja su izvedena na grozdu računala i dvoprocesorskom sustavu. U radu je dodatno analiziran utjecaj ostvarene priručne memorije na učinkovitost raspodijeljene izgradnje BDD dijagrama.
Abstract (english)	Binary decision diagrams (BDDs) are data structures that enable efficient representation and formal verification of digital systems. There are different heuristics that can be employed in order to optimize BDD based formal verification process. In particular, distributed BDD construction and manipulation can be used to make formal verification of digital systems more efficient. The distribution benefits from additional CPU power and larger memory address space. The thesis describes distributed algorithm for BDD manipulation based on combined breadth-first and depth-first BDD construction techniques. The algorithm is targeted for execution on network of workstations. The implementation of algorithm is also given paying great attention to details. The measurement of the distributed BDD creation performance is accomplished by building BDD representation of digital adder and digital multiplier. These circuits are used because of the specific characteristics of their BDD representations. Performance of distributed algorithm is measured using two processor system and a computer cluster. Special analysis on performance impact of distributed computed cache is also given.
Keywords
Keywords (english)
Language	croatian
URN:NBN	urn:nbn:hr:168:881136
Study programme	Title: Postgraduate master programe in computing Study programme type: university Study level: postgraduate Academic / professional title: magistar inženjer računarstva (magistar inženjer računarstva)
Type of resource	Text
File origin	Born digital
Access conditions	Closed access
Terms of use
Repository	FER Repository
Created on	2019-07-16 11:08:37